Research: Design and Evaluation of an Ultra-Low-Power Analog Front-End for Wearable ECG...

Research question: How can an analog front-end circuit be designed to minimize power consumption while maintaining clinically relevant accuracy in wearable ECG acquisition systems?

Wearable ECG devices are increasingly vital for continuous cardiac health monitoring, relying on compact, energy-efficient electronics to ensure long-term operation on limited battery capacity. The analog front-end (AFE) responsible for amplifying and filtering biopotential signals is a key contributor to system power and fidelity.

Existing designs often face trade-offs between power efficiency, noise performance, and signal integrity, particularly under the constraints of wearable applications. Many current solutions are optimized for general biomedical sensing or bench-top systems, but systematic research into ultra-low-power AFEs for ambulatory ECG, with robust benchmarking, remains limited.

This project will review state-of-the-art AFE architectures, propose low-power design hypotheses (e.g., subthreshold operation, chopper stabilization), and simulate/test prototypes using Cadence and bench instrumentation. Performance will be evaluated on open-access ECG datasets and against IEEE standards for wearable biomedical devices. The goal is to quantify trade-offs and propose practical design guidelines for future ultra-low-power wearable ECG front-ends.

Addressing this challenge has significant impact, as it enables more reliable, longer-lasting wearable cardiac monitors, supporting preventive healthcare and early detection of cardiovascular conditions.