Research: Evaluating Memristor Crossbar In-Memory Architectures for Energy-Efficient Ne...

Research question: How do memristor crossbar-based in-memory computing architectures influence the energy efficiency and computational accuracy of neural network inference compared to conventional digital implementations?

Background & Motivation: The rapid growth of artificial intelligence and neural network applications has driven demand for hardware accelerators that overcome the memory bottleneck inherent in von Neumann architectures. Memristor crossbars, which enable in-memory computation, offer a promising route to reduce energy consumption and improve throughput by performing matrix-vector multiplications directly within memory arrays.

Research Gap: While prior work has demonstrated the feasibility of memristor crossbars for neural network operations, there remains limited quantitative analysis on the trade-offs between energy efficiency, computational accuracy, and scalability compared to established CMOS-based digital accelerators.

Approach & Expected Contribution: This project will conduct a comparative experimental study using SPICE simulations and device-level models to evaluate neural network inference tasks implemented on memristor crossbar arrays. The methodology involves benchmarking energy consumption, inference latency, and accuracy degradation due to device non-idealities, with comparison to state-of-the-art digital hardware baselines. The study will propose and validate mitigation strategies for observed accuracy loss.

Significance: The findings will provide actionable insights for researchers and practitioners aiming to deploy low-power AI hardware at the edge, informing future design choices for next-generation neuromorphic systems and advancing the practical adoption of memristor-based in-memory computing.